Cadence tapes out industry’s first LPDDR6/5X memory IP solution

Published 09/07/2025, 15:08
Cadence tapes out industry’s first LPDDR6/5X memory IP solution

SAN JOSE, Calif. - Cadence Design Systems, Inc. (NASDAQ:CDNS), a technology leader with impressive gross profit margins of 86% and a market capitalization of $89 billion, announced Wednesday it has taped out what it describes as the industry’s first LPDDR6/5X memory IP system solution optimized to operate at 14.4Gbps, up to 50% faster than previous generation LPDDR DRAM. According to InvestingPro analysis, the company maintains a "GREAT" financial health score, positioning it well for continued innovation in the semiconductor space.

The new memory IP system is designed to address increasing bandwidth and capacity demands for AI large language models and other compute-intensive workloads. Cadence reports that multiple engagements are currently underway with leading AI, high-performance computing, and data center customers. The company’s strong market position is reflected in its robust 19.5% revenue growth over the last twelve months, with the stock currently trading near its 52-week high of $330.09.

The solution supports both LPDDR6 and LPDDR5X DRAM protocols and can be integrated into traditional monolithic system-on-chips as well as multi-die architectures using Cadence’s chiplet framework. The company’s chiplet framework with the previous LPDDR generation was taped out in 2024.

"LPDDR6 has emerged as a key enabler of accelerated compute, providing the speed, bandwidth, power profile and capacity needed to efficiently perform AI inference," said Boyd Phelps, senior vice president and general manager of the Silicon Solutions Group at Cadence, in the press release.

The memory system is based on Cadence’s existing DDR5 12.8Gbps, LPDDR5X 10.7Gbps, and GDDR7-36G product lines. It targets AI, mobile, consumer, enterprise HPC, and cloud data center markets.

The LPDDR6/5X PHY is available as a customizable drop-in hardened macro for different package and system topologies, while the controller is provided as a soft RTL macro. The solution also includes an LPDDR6 Memory Model for verification purposes.

The new LPDDR6/5X IP is now available for customer engagements and joins Cadence’s family of memory IP system solutions, which includes DDR, GDDR, and HBM technologies.

In other recent news, Cadence Design Systems announced that the U.S. Bureau of Industry and Security has rescinded export license requirements for its electronic design automation software when dealing with parties in China or Chinese military end users. This regulatory update allows Cadence to restore access to its affected software and technology for customers under the updated U.S. export regulations. Additionally, Cadence has expanded its collaboration with Samsung Foundry through a new multi-year intellectual property agreement, focusing on AI-driven design flows for advanced process nodes. The collaboration aims to enhance memory and interface IP solutions for high-performance computing applications. In another development, Cadence revealed plans to offer its engineering design solutions on an industrial AI cloud platform developed with NVIDIA, featuring significant performance enhancements. The company also introduced the Tensilica NeuroEdge 130 AI Co-Processor, designed to improve neural processing unit performance while reducing area and power consumption. Furthermore, Cadence is seeking clarification from the BIS regarding new export controls to China, which could impact its business and financial results.

This article was generated with the support of AI and reviewed by an editor. For more information see our T&C.

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